This question refers to the below PDP8 datapath that is valid only for instructions with op codes 0-5 (the 6 standard memory-based instructions), and only for direct-access (the indirect stage is not included).
So far, we have pretended on our PDP8 datapath that control lines come out of nowhere (magic!) Actually, the control lines come from a control unit that takes input from a few different sources. For the subset of instructions supported by the datapath above, the control unit will input the 3-bit op code of the instruction (held in the IR), and a single bit from the Major State Generator. The op code determines which instruction to execute (000=AND, 001=TAD, 010=ISZ, 011=DCA, 100=JMS, 101=JMP), and the state bit determines in which state the datapath is currently functioning (0 for fetch, and 1 for execute). This question ignores the other 2 op codes and the indirect stage.
Of the control values shown in blue on the diagram above, all can be set using these 4 bits except “Page”. We have not discussed the PDP8 ALU, so you can ignore the ALUop control, but you should be able to determine the rest.Give a minimal logic expression for each of the control values. Set “don’t-care” values strategically to minimize the expressions. Usec2, c1,andc0to represent the 3 bits from the op code, withc2most significant. Usesto represent the state bit. Minimize each expression however you want, but given the 4 input bits, one Karnaugh map for each control will definitely work.
As an example, the minimal expression forIRwis just~s(not s), as IR should be written always when in the fetch state, and never when in the execute state. The rest are probably more complicated.
Notes on this datapath implementation:
– ISZ uses the ALU to add 1 to the read data and write the result back to memory. The actual skip
logic is not shown and you do not have to explain it, only the controls that are shown in blue.
– DCA uses the ACin MUX to write a 0 to the AC instead of the ALU output.
– You can just ignore the link bit.
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